Design and Evaluation of a Processor Test System for the Bunch-by-bunch Transverse Feedback System of CSNS RCS

The China Spallation Neutron Source (CSNS) is currently planning for a second phase upgrade, of which the intensity of the Rapid Cycling Synchrotron (RCS) is expected to reach the highest international level after the upgrade. However, the beam transverse oscillation is one of the key factors limiting the increase of RCS power. Therefore, CSNS RCS needs to introduce a bunch-by-bunch transverse feedback system to suppress the transverse oscillation. The feedback processor is the core component of the feedback system. In order to evaluate its electronic performance, this paper has constructed a corresponding test system and completed a series of performance tests. The test results show that the ENOB of the analog-to-digital conversion circuit reaches 10 bits, the non-linearity of the digital-to-analog conversion circuit is less than 3 LSB, and the phase accuracy of the feedback signal is better than 1° within the range of the revolution frequency from 504 kHz to 1.22 MHz, under the premise that the total feedback delay is controlled within 5 cycles.