Abstract: To meet the demands of particle detection and identification in high-energy physics experiments, the development of silicon pixel detectors is increasingly oriented toward achieving the performance goals of low power consumption, high resolution, and high readout efficiency. This paper presents a silicon pixel detector readout ASIC named IMPix-N1. The pixel array comprises 16 rows × 16 columns of square pixels, with a size of 100 μm × 100 μm. Each pixel unit 1 row × 8 columns forms a super pixel, which is internally controlled by a shared logic circuit. The ASIC features a pixel configuration mode and three pixel data readout modes, enabling the measurement, storage, and readout of time, energy, and position information of incident particles. The Time-to-Digital Converter (TDC) circuit can simultaneously measure and record the Time of Arrival (TOA) and Time Over Threshold (TOT) of particles, with a timing resolution of 5 ns. The IMPix-N1 is suitable for particle detection experiments requiring high time resolution, high spatial resolution, and fast data acquisition. This ASIC is implemented based on TSMC 180 nm technology, adopting a digital-on-top design methodology throughout. We conducted simulation verifications on the digital circuit of the pixel unit, the control circuit of the super pixel, and the peripheral digital circuits. The pre- and post-layout simulation results are consistent, meeting the design requirements.