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二维游标TDC芯片的性能测试

Performance Testing of a Two-dimensions Vernier TDC ASIC

  • 摘要: 时间数字转换器在核与粒子物理实验领域存在着广泛的应用,并且随着高能物理实验的发展,对TDC的精度提出了越来越高的要求。中国科学技术大学核探测与核电子学国家重点实验室基于二维游标结构在180 nm工艺下设计了一款高精度TDC(Time-to-digital Converter) ASIC(Application Specific Integrated Circuit)。为评估原型芯片的性能,建立了测试平台,并且设计了测试电子学模块对原型芯片进行测试。测试电子学模块可接收处理多个TDC芯片数据并进行高速数据传输,针对高精度TDC的非线性问题,采用硬件非线性校准方法,大幅提升了TDC的精度。此外,为了未来进行大批量测试,设计了一套自动化测试软件系统,实现了自动时间扫描和数据采集,提高了测试效率。测试结果表明,该TDC具有良好的性能,芯片设计bin size为22.7 ps,进行非线性校准后在2.5 μs动态范围内时间精度好于10 ps RMS。

     

    Abstract: TDCs (Time-to-digital Converters) are widely applied in nuclear and particle physics experiments. With the development of high energy physics experiments, higher and higher TDC precision is required. A Two-Dimensions Vernier based TDC prototype ASIC based on 180 nm CMOS technology was designed in State Key Laboratory of Particle Detection and Electronics, which features a high resolution. A test platform was set up and a test module was designed for the TDC performance evaluation. The test module can receive multiple TDC chips’ data and transfer them with a high speed, and to cope with the nonlinear problem of high-precision TDCs, the hardware nonlinear calibration method is adopted to greatly improve the accuracy of TDCs. In order to facilitate the massive testing in the future, an automatic test software system was also developed which can automatically perform time interval scan and data collection, improving test efficiency. Test results indicate that this TDC achieves a time resolution of better than 10 ps RMS with a bin size of around 22.7 ps and a measurement dynamic range of up to 2.5 µs.

     

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